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Update IMS-VSG181h.yml (#2779)

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* Update IMS-VSG181h.yml

Drop long description

* Update IMS-VSG181h.yml

fix issues

---------

Co-authored-by: Harry <Harry@cadby.co.uk>
This commit is contained in:
Walday
2025-02-14 02:43:22 +05:00
committed by GitHub
parent 1e56bb3fca
commit db6a9d0424
1 changed files with 1 additions and 2 deletions
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module-types/Meinberg/IMS-VSG181h.yml
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@@ -1,7 +1,6 @@
---
manufacturer: Meinberg
description: 'Two BNC outputs and a DB15 multi-output with configurable video and audio signals: Black & Burst and tri-level sync DARS (Digital Audio Reference
Signal), unbalanced 15-Pin Multi-Output - LTC (Linear Time Code), balanced and unbalanced DARS (Digital Audio Reference Signal), balanced Word Clock'
description: Two BNC outputs and a DB15 multi-output with configurable video and audio signals
model: IMS-VSG181h
rear-ports:
- name: Black Out